TECH 63: Analog and Digital Circuits
San Jose State University
Logic gates emphasizing TTL and CMOS. Design techniques. Combinational circuits, counters, registers, multiplexers, Semiconductor theory. Operational amplifiers. Device applications, signal generators, voltage regulators and power supplies. Lecture 2 hours/lab 3 hours. Prerequisite(s): TECH 60, MATH 71 or MATH 30.
Average GPA: 3.07
Grade distribution records: 623 students across 16 terms.
Grade distribution
| Grade | Students | Percent |
|---|---|---|
| A+ | 12 | 1.9% |
| A | 116 | 18.6% |
| A- | 117 | 18.8% |
| B+ | 80 | 12.8% |
| B | 106 | 17.0% |
| B- | 54 | 8.7% |
| C+ | 40 | 6.4% |
| C | 40 | 6.4% |
| C- | 31 | 5.0% |
| D+ | 4 | 0.6% |
| D | 6 | 1.0% |
| D- | 5 | 0.8% |
| F | 12 | 1.9% |
Based on 623 student grade records across 16 terms and 4 professors.
Instructors
- Mostafa Mortezaie 465 students, Average GPA 3.10
- Pouya Ostovari 91 students, Average GPA 3.14
- Tom Brown Jr 42 students, Average GPA 2.48
- Fariah Mahzabeen 25 students, Average GPA 3.28