Digital integrated circuit design covered with an emphasis on high-speed and low-power applications. Covers signaling techniques and circuits including transmitters and receivers, with emphasis on on-chip interconnect, timing fundamentals and timing circuits. Theoretical fundamentals of phase locked loops and design issues of implementation addressed. Course has a project design component. Interview to assess technical skills of student. Enrollment is restricted to electrical engineering and computer engineering graduate students. (Formerly EE 222.) May be repeated for credit.
4 terms
Other grades
University of California, Santa Cruz
ECE 222 at UCSC: average GPA 3.51 across 43 students. Grade distribution by term. Digital integrated circuit design covered with an emphasis on high-speed and…
Average GPA: 3.51
Grade distribution records: 43 students across 4 terms.
| Grade | Students | Percent |
|---|---|---|
| A+ | 4 | 9.3% |
| A | 10 | 23.3% |
| A- | 5 | 11.6% |
| B+ | 4 | 9.3% |
| F | 2 | 4.7% |
| P | 2 | 4.7% |
| S | 16 | 37.2% |
Based on 43 student grade records across 4 terms and 2 professors.
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