ECE 222: Hi-Speed Lo-Pwr IC

University of California, Santa Cruz

Digital integrated circuit design covered with an emphasis on high-speed and low-power applications. Covers signaling techniques and circuits including transmitters and receivers, with emphasis on on-chip interconnect, timing fundamentals and timing circuits. Theoretical fundamentals of phase locked loops and design issues of implementation addressed. Course has a project design component. Interview to assess technical skills of student. Enrollment is restricted to electrical engineering and computer engineering graduate students. (Formerly EE 222.) May be repeated for credit.

Average GPA: 3.51

Grade distribution records: 43 students across 4 terms.

Grade distribution

Based on 43 student grade records across 4 terms and 2 professors.

Instructors

• Sung Mo Kang 32 students, Average GPA 3.46
• Austin Chen 11 students, Average GPA 3.75