CMPE 125: Digital Design
San Jose State University
Combinational and sequential logic theory and circuits with emphasis on mixed logic and algorithmic state machines. Digital system building blocks, data path and control units, system-level RTL design, Verilog/SystemVerilog HDL for design and verification, contemporary design flow and methodology. Lab component includes experiments using industry standard CAD tools and field programmable gate array (FPGA) devices. Prerequisite(s): CMPE 70 (with grade of "C-" or better). Computer Engineering or Software Engineering Majors Only. Lecture 3 hours/lab 3 hours.
Average GPA: 2.89
Grade distribution records: 944 students across 16 terms.
Grade distribution
| Grade | Students | Percent |
|---|---|---|
| A+ | 19 | 2.0% |
| A | 177 | 18.8% |
| A- | 88 | 9.3% |
| B+ | 74 | 7.8% |
| B | 215 | 22.8% |
| B- | 68 | 7.2% |
| C+ | 57 | 6.0% |
| C | 122 | 12.9% |
| C- | 83 | 8.8% |
| D+ | 1 | 0.1% |
| D | 24 | 2.5% |
| F | 16 | 1.7% |
Based on 944 student grade records across 16 terms and 3 professors.
Instructors
- Jahan Ghofraniha 621 students, Average GPA 2.95
- Donald L Hung 275 students, Average GPA 2.63
- Nima Karimianbahnemiri 48 students, Average GPA 3.51