EE 178: Digital Design with FPGAs
San Jose State University
Advanced Digital Design Technologies as they relate to synchronous digital systems. Requires student design projects that deal with the use of CAD tools for the Design, Simulation, and Implementation of Systems with FPGAs. Prerequisite(s): EE 118 with a grade of "C-" or better.
Average GPA: 3.63
Grade distribution records: 363 students across 12 terms.
Grade distribution
| Grade | Students | Percent |
|---|---|---|
| A+ | 13 | 3.6% |
| A | 188 | 51.8% |
| A- | 68 | 18.7% |
| B+ | 40 | 11.0% |
| B | 25 | 6.9% |
| B- | 8 | 2.2% |
| C+ | 5 | 1.4% |
| C | 7 | 1.9% |
| C- | 5 | 1.4% |
| F | 4 | 1.1% |
Based on 363 student grade records across 12 terms and 4 professors.
Instructors
- Shrikant Shridhar Jadhav 223 students, Average GPA 3.75
- Christopher H Pham 67 students, Average GPA 3.36
- Tan V Nguyen 39 students, Average GPA 3.41
- Eric J Crabill 34 students, Average GPA 3.68